As it is well known, fluorescent lamps have always been driven using the so-called magnetic ballasts.
However, the need for more and more power together with an improved power quality has made it necessary to develop circuit topologies capable of offering improved electric performances and advantages also in terms of weight and size.
From the physical point of view, the weight and size of the components of these circuit topologies have been reduced by using applications operating at a higher frequency than the supply frequency (typically 50-60 Hz), essentially to replace the heavy magnetic ballasts, providing some advantages in terms of performances, weight and size.
From the electric point of view, performances have been improved mainly in terms of the quality of the supplied electric power. In particular, the problem of the harmonic content linked to the use of circuit topologies comprising components operating at high frequencies has been addressed, this harmonic content being capable of decreasing the so-called power factor or PF (acronym of the English “Power Factor”).
In fact, as it is well known, in the normal operation of an electronic ballast, the power transfer from a power supply line to a high frequency circuit portion is performed by using a rectifying section composed of a diode bridge and an electrolytic clamping capacitor.
This rectifying section simply turns a line voltage from alternate (AC) to direct (DC). Unfortunately, the intermittent operation of the diodes comprised therein presents to the power supply line a pulsating current with a high harmonic component, a characteristic which lowers the power factor PF (generally to about 0.5).
Several methods have been implemented, which are suitable for increasing the power supplied by the circuits and reducing the harmonic content in the line current to which these circuits are connected.
One of these known methods provides the use of a circuit network capable of correcting the power factor PF. This network is commonly indicated with the term PFC cell. The main feature of this network is that it creates a current wave-form at the electronic ballast input being sinusoidal and phased with the line voltage.
One of the most widespread circuit topologies to realize such a network is the one based on the principle being generally known as boost converter.
A traditional diagram of a PFC cell based on this principle is schematically shown in FIG. 1.
The PFC cell 10 essentially comprises a controlled switch SW.
In particular, the PFC cell 10 has a first I1 and second input terminal I2, as well as a first O1 and second output terminal O2.
The first input terminal I1 is connected to the first output terminal O1 by means of the series connection of an inductor L and a diode D, connected to each other in correspondence with an inner circuit node X.
The second input terminal I2 is directly connected to the second output terminal O2.
The controlled switch SW is inserted between the inner circuit node X and the second input terminal I2, i.e. the second output terminal O2 and it has a driving terminal connected to a convenient driving circuit 12.
The PFC cell 10 is connected to a first T1 and a second network terminal T2 by means of a diode bridge 11. In particular, the diode bridge 11 comprises a first pair of diodes D1, D2 inserted between the first input terminal I1 and the second input terminal I2 of the PFC cell 10 and interconnected in correspondence with the first network terminal T1, as well as a second pair of diodes D3, D4 inserted, in parallel with the first pair of diodes D1, D2, between the first input terminal I1 and the second input terminal I2 and interconnected in correspondence with the second network terminal T2. The diode bridge 11, comprising the pairs of diodes D1-D2 and D3-D4, serves as an input rectifying bridge.
The PFC cell 10 also has the input I1, I2 and output O1, O2 terminals respectively connected to a first capacitor C1 and a second capacitor C2.
The PFC cell 10 is finally connected to a load Z inserted between the output terminals O1 and O2.
The assembly of the capacitor C2 and the PFC cell 10 substantially realizes an active filter driven by the driving circuit 12 and being capable of controlling the harmonic content of the power absorbed by the load.
In the great majority of cases, the switch SW is an electronic switch realized with an active component of the MOSFET type, driven by the integrated IC driving circuit 12 so as to regulate the conduction time thereof.
However, the use of an integrated circuit IC to drive the electronic switch SW makes the circuit topology of the PFC cell 10 shown in FIG. 1 expensive and thus suitable for higher-priced products.
The need thus exists in the market of new systems using low-cost PFC cells to meet the requirements of lower-priced, more economical products, following in the meantime new regulations and needs for a better and better quality of the power supplied.
The removal of the integrated circuit IC being used in known solutions to modulate the conduction time of the PFC cell switch leads, however, to a drastic decrease of the PFC cell performance.